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   www.irf.com 1 the afl series of dc/dc converters feature high powerdensity with no derating over the full military temperature range. this series is offered as part of a complete family of converters providing single and dual output voltages and operating from nominal +28v or +270v inputs with output power ranging from 66w to 120w. for applications requiring higher output power, multiple converters can be operated in parallel. the internal current sharing circuits assure equal current distribution among the paralleled converters. this series incorporates international rectifiers proprietary magnetic pulse feedback technology providing optimum dynamic line and load regulation response. this feedback system samples the output voltage at the pulse width modulator fixed clock frequency, nominally 550khz. multiple converters can be synchronized to a system clock in the 500khz to 700khz range or to the synchronization output of one converter. under voltage lockout, primary and secondary referenced inhibit, soft start and load fault protection are provided on all models. description  80v to 160v input range  3.3v output  high power density - 46w/in 3  66w output power  parallel operation with stress and current sharing  low profile (0.380") seam welded package  ceramic feed thru copper core pins  high efficiency - to 74%  full military temperature range  continuous short circuit and overload protection  remote sensing terminals  primary and secondary referenced inhibit functions  line rejection > 50db - dc to 50khz  external synchronization port  fault tolerant design  dual output versions available  standard microcircuit drawing available features afl 120v input, 3.3v output afl12003r3s hybrid-high reliabilitydc/dc converter manufactured in a facility fully qualified to mil-prf-38534, these converters are fabricated utilizing dscc qualified processes. for available screening options, refer to device screening table in the data sheet. variations in electrical, mechanical and screening can be accommodated. contact ir santa clara for special requirements. these converters are hermetically packaged in twoenclosure variations, utilizing copper core pins to minimize resistive dc losses. three lead styles are available, each fabricated with international rectifiers rugged ceramic lead- to-package seal assuring long term hermeticity in the most harsh environments. pd - 94448e downloaded from: http:///
2 www.irf.com afl12003r3s specifications electrical performance characteristics -55c < t case < +125c, 80v < v in < 160v unless otherwise specified. for notes to specifications, refer to page 3 input voltage -0.5v to +180vdc soldering temperature 300c for 10 seconds operating case temperature -55c to +125c storage case temperature -65c to +135c absolute maximum ratings parameter group a subgroups test conditions min nom max unit input voltage note 6 80 120 160 v output voltage 1 2, 3 v in = 120 volts, 100% load 3.27 3.23 3.30 3.33 3.37 v output current v in = 80, 120, 160 volts, note 6 20 a output power note 6 66 w maximum capacitive load 4 note 1 10,000 f output voltage temperature coefficient v in = 120 volts, 100% load - note 1, 6 -0.015 +0.015 %/c output voltage regulation line load 1, 2, 3 1, 2, 3 no load, 50% load, 100% load v in = 80, 120, 160 volts -10.0 -35.0 +10.0 +35.0 mv output ripple voltage 1, 2, 3 v in = 80, 120, 160 volts, 100% load, bw = 10mhz 30 mv pp input current no load inhibit 1 inhibit 2 1 2, 3 1, 2, 3 1, 2, 3 v in = 120 volts i out = 0 pin 4 shorted to pin 2 pin 12 shorted to pin 8 30 40 3.0 5.0 ma input ripple current 1, 2, 3 v in = 120 volts, 100% load b.w. = 10mhz 60 ma pp current limit point expressed as a percentage of full rated load 1 2 3 v out = 90% v nom note 5 115 105 125 125 115 140 % load fault power dissipation overload or short circuit 1, 2, 3 v in = 120 volts 32 w efficiency 1, 2, 3 v in = 120 volts, 100% load 72 74 % switching frequency 1, 2, 3 500 550 600 khz isolation 1 input to output or any pin to case (except pin 3). test @ 500vdc 100 m ? mtbf mil-hdbk-217f, aif @ t c = 40c 300 khrs downloaded from: http:///
www.irf.com 3 afl12003r3s elecrical performance characteristics (continued) notes to specifications: 1. parameters not 100% tested but are guaranteed to the limits specified in the table. 2. recovery time is measured from the initiation of the transient to where v out has returned to within 1.0% of v out at 50% load. 3. line transient transition time 100 s. 4. turn-on delay is measured with an input voltage rise time of between 100v and 500v per millisecond. 5. current limit point is that condition of excess load causing output voltage to drop to 90% of nominal. 6. parameter verified as part of another test. 7. all electrical tests are performed with the remote sense leads connected to the output leads at the load. 8. load transient transition time 10 s. 9. enable inputs internally pulled high. nominal open circuit voltage 4.0vdc. parameter group a subgroups test conditions min nom max unit enable inputs (inhibit function) converter off sink current converter on sink current 1, 2, 3 1, 2, 3 logical low, pin 4 or pin 12 note 1 logical high, pin 4 and pin 12 - note 9 note 1 -0.5 2.0 0.8 100 50 100 v a v a synchronization input frequency range pulse amplitude, hi pulse amplitude, lo pulse rise time pulse duty cycle 1, 2, 3 1, 2, 3 1, 2, 3 note 1 note 1 500 2.0 -0.5 20 700 10 0.8 100 80 khz v v ns % load transient response amplitude recovery amplitude recovery 4, 5, 6 4, 5, 6 4, 5, 6 4, 5, 6 note 2, 8 load step 50% ? 100% load step 10% ? 50% -450 -450 450 200 450 400 mv s mv s line transient response amplitude recovery note 1, 2, 3 v in step = 80 ? 160 volts -500 500 500 mv s turn-on characteristics overshoot delay 4, 5, 6 4, 5, 6 v in = 80, 120, 160 volts. note 4 enable 1, 2 on. (pins 4, 12 high or open) 50 75 250 120 mv ms load fault recovery same as turn on characteristics. line rejection mil-std-461, cs101, 30hz to 50khz note 1 50 60 db downloaded from: http:///
4 www.irf.com afl12003r3s block diagram figure i. afl single output connection of the + and - sense leads at a remotely located load permits compensation for resistive voltage dropbetween the converter output and the load when they are physically separated by a significant distance. this connection allows regulation to the placard voltage at the point of application.when the remote sensing features is figure ii. enable input equivalent circuit pin 4 or pin 12 1n4148 100k 290k 150k 2n3904 +5.6 v disable pin 2 or pin 8 not used, the sense leads should be connected to theirrespective output terminals at the converter. figure iii. illustrates a typical application. circuit operation and application informationthe afl series of converters employ a forward switched mode converter topology. (refer to figure i.) operation of the device is initiated when a dc voltage whose magnitude is within the specified input limits is applied between pins 1 and 2. if pin 4 is enabled (at a logical 1 or open) the primary bias supply will begin generating a regulated housekeeping voltage bringing the circuitry on the primary side of the converter to life. two power mosfets used to chop the dc input voltage into a high frequency square wave, apply this chopped voltage to the power transformer. as this switching is initiated, a voltage is impressed on a second winding of the power transformer which is then rectified and applied to the primary bias supply. when this occurs, the input voltage is shut out and the primary bias voltage becomes exclusively internally generated. the switched voltage impressed on the secondary output transformer winding is rectified and filtered to provide the converter output voltage. an error amplifier on the secondary side compares the output voltage to a precision reference and generates an error signal proportional to the difference. this error signal is magnetically coupled through the feedback transformer into the controller section of the converter varying the pulse width of the square wave signal driving the mosfets, narrowing the width if the output voltage is too high and widening it if it is too low. remote sensing inhibiting converter output (enable) as an alternative to application and removal of the dcvoltage to the input, the user can control the converter output by providing ttl compatible, positive logic signals to either of two enable pins (pin 4 or 12). the distinction between these two signal ports is that enable 1 (pin 4) is referenced to the input return (pin 2) while enable 2 (pin 12) is referenced to the output return (pin 8). thus, the user has access to an inhibit function on either side of the isolation barrier. each port is internally pulled high so that when not used, an open connection on both enable pins permits normal converter operation. when their use is desired, alogical low on either port will shut the converter down. error amp & ref output filter input filter output return + input input return control 1 2 4 3 5 6 sync input current sense + sense return sense sense amplifier enable 2 share share amplifier 7 11 10 9 12 8 + output sync output enable 1 case primary bias supply downloaded from: http:///
www.irf.com 5 afl12003r3s high l evel of +2.0v. the sync output of another converter which has been designated as the master oscillator providesa convenient frequency source for this mode of operation. when external synchronization is not required, the sync in pin should be left unconnected thereby permitting the converter to operate at its own internally set frequency. the sync output signal is a continuous pulse train set at 550 50khz, with a duty cycle of 15 5.0%. this signal is referenced to the input return and has been tailored to becompatible with the afl sync input port. transition times are less than 100ns and the low level output impedance is less than 50 ? . this signal is active when the dc input voltage is within the specified operating range and theconverter is not inhibited. this output has adequate drive reserve to synchronize at least five additional converters. a typical synchronization connection option is illustrated in figure iii. figure iii. preferred connection for parallel operation optional synchronization connection power input (other converters) share bus 16 afl 7 12 - sense enable 2 + vout return + sense share vinrtn case enable 1 sync out sync in 16 afl 7 12 - sense enable 2 + vout return + sense share vinrtn case enable 1 sync out sync in 16 afl 7 12 - sense enable 2 + vout return + sense share vinrtn case enable 1 sync out sync in to load afl series operating in the parallel mode is that in  addition to sharing the current, the stress induced by temperaturewill also be shared. thus if one member of a paralleled set is operating at a higher case temperture, the current it provides to the load will be reduced as compensation for the temperature induced stress on that device. when operating multiple converters, system requirementsoften dictate operation of the converters at a common frequency. to accommodate this requirement, the afl series converters provide both a synchronization input and output. the sync input port permits synchronization of an afl converter to any compatible external frequency source oper- ating between 500khz and 700khz. this input signal should be referenced to the input return and have a 10% to 90% duty cycle. compatibility requires transition times less than 100 ns, maximum low level of +0.8v and a minimum figure iii. illustrates the preferred connection scheme foroperation of a set of afl converters with outputs operating in parallel. use of this connection permits equal sharing of a load current exceeding the capacity of an individual afl among the members of the set. an important feature of the internally, these ports differ slightly in their function. in use,a low on enable 1 completely shuts down all circuits in the converter while a low on enable 2 shuts down the secondary side while altering the controller duty cycle to near zero. externally, the use of either port is transparent to the user save for minor differences in idle current. (see specification table). synchronization of multiple converters parallel operation-current and stress sharing downloaded from: http:///
6 www.irf.com afl12003r3s for minor variations of either surface. while other availabletypes of heat conductive materials and compounds may provide similar performance, these alternatives are often less convinient and are frequently messy to use. a conservative aid to estimating the total heat sink surface area (a heat sink ) required to set the maximum case temperature rise ( ? t) above ambient temperature is given by the following expression: a heat sink ?? ? ?? ? ? ? ? t p 80 30 085 143 . . . where ? t pp eff out = == ? ?? ? ?? ? case temperature rise above ambient device dissipation in watts 1 1 ? t = 85 - 25 = 60c () p =? ? ? ?? ? ?? =? = 120 1 83 1 120 0 205 24 6 . .. w and the required heat sink area is a = 60 80 24.6 in heat sink 0.85 ? ?? ? ?? ? ?= ? 143 2 30 71 . . from the specification table, the worst case full loadefficiency for this device is 83%; therefore the power dissipation at full load is given by because of the incorporation of many innovativetechnological concepts, the afl series of converters is capable of providing very high output power from a package of very small volume. these magnitudes of power density can only be obtained by combining high circuit efficiency with effective methods of heat removal from the die junctions. this requirement has been effectively addressed inside the device; but when operating at maximum loads, a significant amount of heat will be generated and this heat must be conducted away from the case. to maintain the case temperature at or below the specified maximum of 125c, this heat must be transferred by conduction to an appropriate heat dissipater held in intimate contact with the converter base-plate. because effectiveness of this heat transfer is dependent on the intimacy of the baseplate/heatsink interface, it is strongly recommended that a high thermal conductivity heat transferance medium is inserted between the baseplate and heatsink. the material most frequently utilized at the factory during all testing and burn-in processes is sold under the trade name of sil-pad ? 400 1 . this particular pro duct is an insulator but electrically conductive versions are alsoavailable. use of these materials assures maximum surface contact with the heat dissipator thereby compensating when operating in the shared mode, it is important thatsymmetry of connection be maintained as an assurance of optimum load sharing performance. thus, converter outputs should be connected to the load with equal lengths of wire of the same gauge and sense leads from each converter should be connected to a common physical point, preferably at the load along with the converter output and return leads. all converters in a paralleled set must have their share pins connected together. this arrangement is diagrammatically illustrated in figure iii. showing the outputs and sense pins connected at a star point which is located close as possible to the load. as a consequence of the topology utilized in the currentsharing circuit, the share pin may be used for other functions. in applications requiring a single converter, the voltage appearing on the share pin may be used as a current monitor. the share pin open circuit voltage is nominally +1.00v at no load and increases linearly with increasing output current to +2.20v at full load. the share pin voltage is referenced to the output return pin. thus, a total heat sink surface area (including fins, if any) of71 in 2 in this example, would limit case rise to 60c above ambient. a flat aluminum plate, 0.25" thick and of approximatedimension 4" by 9" (36 in 2 per side) would suffice for this application in a still air environment. note that to meet thecriteria in this example, both sides of the plate require unrestricted exposure to the ambient air. 1 sil-pad is a registered trade mark of bergquist, minneapolis, mn as an example, it is desired to maintain the case temperatureof an afl27015s at +85c in an area where the ambient temperature is held at a constant +25c; then thermal considerations downloaded from: http:///
www.irf.com 7 afl12003r3s r = 100 - -.025 adj nom out nom ? ?? ? ?? ? v vv where v nom = device nominal output voltage, and v out = desired output voltage figure v. connection for v out adjustment input filter undervoltage lockout the afl120xxs series converters incorporate a lc inputfilter whose elements dominate the input load impedance characteristic at turn-on. the input circuit is as shown in figure iv. figure iv. input filter circuit pin 1 pin 2 16.8uh 0.78uf a minimum voltage is required at the input of the converterto initiate operation. this voltage is set to 74v 4.0v. to preclude the possibility of noise or other variations at theinput falsely initiating and halting converter operation, a hysteresis of approximately 7.0v is incorporated in this circuit. thus if the input voltage droops to 67v 4.0v, the converter will shut down and remain inoperative until theinput voltage returns to 74v. output voltage adjust in addition to permitting close voltage regulation of remotelylocated loads, it is possible to utilize the converter sense pins to incrementally increase the output voltage over a limited range. the adjustments made possible by this method are intended as a means to trim the output to a voltage setting for some particular application, but are not intended to create an adjustable output converter. these output voltage setting variations are obtained by connecting an appropriate resistor value between the +sense and -sense pins while connecting the -sense pin to the output return pin as shown in figure v. below. the range of adjustment and corresponding range of resistance values can be determined by use of the following equation. finding a resistor value for a particular output voltage, issimply a matter of substituting the desired output voltage and the nominal device voltage into the equation and solving for the corresponding resistor value. enable 2 share + sense - sense return + v out to load r adj afl120xxs caution: do not set r adj < 500 ? attempts to adjust the output voltage to a value greater than120% of nominal should be avoided because of the potential of exceeding internal component stress ratings and subsequent operation to failure. under no circumstance should the external setting resistor be made less than 500 ? . by remaining within this specified range of values, completelysafe operation fully within normal component derating limits is assured. examination of the equation relating output voltage andresistor value reveals a special benefit of the circuit topology utilized for remote sensing of output voltage in the afl120xxs series of converters. it is apparent that as the resistance increases, the output voltage approaches the nominal set value of the device. in fact the calculated limiting value of output voltage as the adjusting resistor becomes very large is 25mv above nominal device voltage. the consequence is that if the +sense connection isunintentionally broken, an afl120xxs has a fail-safe output voltage of vout + 25mv, where the 25mv is independent of the nominal output voltage. it can be further demonstrated that in the event of both the + and - sense connections being broken, the output will be limited to vout + 440mv. this 440mv is also essentially constant independent of the nominal output voltage. while operation in this condition is not damaging to the device, not at all performance parameters will be met. downloaded from: http:///
8 www.irf.com afl12003r3s mechanical outlines case x case w pin variation of case y 1.260 1.500 2.500 2.760 3.000 ? 0.128 0.2501.000 ref 0.200 typ non-cum 0.050 0.220 pin? 0.040 0.238 max 0.380 max 2.975 max 1 6 7 12 0.050 0.220 0.250 1.000 pin ? 0.040 0.525 0.380 max 2.800 0.42 case y case z pin variation of case y 1.500 1.750 2.500 0.25 typ 1.150 0.050 0.220 1 6 7 12 1.750 0.375 2.00 0.2501.000 ref 0.200 typ non-cum pin? 0.040 0.300 ? 0.140 0.238 max 0.380 max 2.975 max 0.050 0.220 0.2501.000 ref pin ? 0.040 0.525 0.380 max 2.800 0.36 ber yllia w arning : these converters are hermetically sealed; however they contain beo substrates and should not be ground or subjected to any o ther operations including exposure to acids, which may produce beryllium dust or fumes containing beryllium tolerances, unless otherwise specified: .xx = 0.010 .xxx = 0.005 downloaded from: http:///
www.irf.com 9 afl12003r3s pin designation pin # designation 1 + input 2 input return 3 case ground 4 enable 1 5 sync output 6 sync input 7 + output 8 output return 9 return sense 10 + sense 11 share 12 enable 2 standard microcircuit ir standard drawing number part number 5962-02548 afl12003r3s standard microcircuit drawing equivalence table downloaded from: http:///
10 www.irf.com afl12003r3s part numbering notes:  best commercial practice  sample tests at low and high temperatures  -55c to +105c for ahe, ato, atw world headquarters: 233 kansas st., el segundo, california 90245, tel: (310) 322 3331 ir santa clara: 2270 martin av., santa clara, california 95050, tel: (408) 727-0500 visit us at www.irf.com for sales contact information . data and specifications subject to change without notice. 12/2006 device screening requirement mil-std-883 method no suffix es hb ch temperature range -20c to +85c -55c to +125c -55c to +125c -55c to +125c element evaluation mil-prf-38534 n/a n/a n/a class h non-destructive bond pull internal visual 2017  yes yes yes temperature cycle 1010 n/a cond b cond c cond c constant acceleration 2001, y1 axis n/a 500 gs 3000 gs 3000 gs pind 2020 n/a n/a n/a n/a burn-in 1015 n/a 48 hrs@hi temp 160 hrs@125c 160 hrs@125c final electrical mil-prf-38534 25c 25c  -55c, +25c, -55c, +25c, ( group a ) & specification +125c +125c pda mil-prf-38534 n/a n/a n/a 10% seal, fine and gross 1014 cond a cond a, c cond a, c cond a, c radiographic 2012 n/a n/a n/a n/a external visual 2009  yes yes yes n/a n/a 2023 n/a n/a afl 120 03r3 s x /ch model input voltage 28 = 28v 50 = 50v 120 = 120v 270 = 270v output voltage 03r3 = 3.3v output s = single case style w, x, y, z screening level (please refer to screening table) no suffix, es, hb, ch downloaded from: http:///


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